The disclosed circuits are suitable for compact implementation in VLSI technology. Each elementary circuit is composed of DACs, integrators, hysteresis quantizers, delay elements and simple asynchronous logical gates. All the circuit feedback signals and the circuit output signal encode analog information in the time domain via asynchronous spike signals with just two amplitude levels. The information in these signals is not quantized.
The present invention provides apparatuses and methods for solving systems of coupled first order non-linear differential equations in either the spike domain or the pulse domain without quantization noise. As such the disclosed apparatuses and methods allow for fast feature extraction tasks to occur in either the spike domain or pulse domain, again without quantization noise. The disclosed technology can be applied to real-time non-linear processing of input analog signals, such as signals from RF or hyperspectral sensors.
Previously these tasks could be solved in the (1) original analog domain via analog amplifiers or in the (2) digital domain after an ADC (Analog to Digital Converter) digitization. In the analog domain the disadvantage is that accuracy is severely limited by dynamic range of the analog components (feedback analog amplifiers). In the digital domain the disadvantages include the fact that speed is limited by the performance of ADC conversion and that frequently digital circuits include timing gates that regardless of their frequency have the effect of introducing quantization noise since the (i) the amplitude of digital signals is inherently quantized and the timing of transitions is quantized by the presence of timing gates.
The disclosed circuitry avoids: (1) the accuracy limitations of analog computing and (2) the speed limitation and quantization noise of traditional ADC conversion. The implementation of the suggested circuit is more compact than an equivalent analog circuit or a traditional digital circuit. The key circuit components are hysteresis quantizers, integrators, and simple (and intrinsically-linear) 1-bit digital to analog converters.
The prior art includes:
(1) A. Lazar and L Toth, “Perfect Recovery and Sensitivity Analysis of Time Encoded Bandlimited Signals,” IEEE Trans. on Circuits and Systems-I, vol. 51, no. 10, pp. 2060-2073, October 2004. This document discloses a single time encoder circuit limit cycle oscillator. However, in this work the circuit has a single input and a single output. No computation is done beside the conversion from analog to pulse type.
(2) J. Cruz et al., “A 16×16 Cellular Neural Network Universal Chip,” in Cellular Neural Networks and Analog VLSI, edited by L. Chua et al., Kluwer Academic Publishers, 1998. This document provides an example of an analog network to do classification tasks. The information is encoded in the amplitude of voltages or current signals. Accuracy is limited by the analog components, such as transconductance amplifiers.
(3) FIG. 1 is a diagram of a prior art time encoder. This circuit has a single analog input 2 and a single pulse output 4. This circuit encodes analog input signals into a pulse signals. If the analog signal is band limited the encoding can be without loss of information. That is, the input u(t) can be recovered from the timing of the output signal z(t). A time decoding machine of the type disclosed by Lazar and Toth (cited above) can be used to perfectly recover the analog input u(t) from the asynchronous pulse output z(t).